Intel SE7525GP2 driver and firmware
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Product Specification - Page 2
Revision History
Intel® Server Boards SE7320SP2 and SE7525GP2
Revision History
Date June 2004 November 2004 September 2005 December 2005
Revision Number
Modifications
1.0 Initial Release
2.0
Updated and clarified memory support, removed LX SKU references, added MTBF calculations, performed general grammar and spelling updates.
Updated supported processors matrix and BIOS setup options...
Product Specification - Page 5
Intel® Server Boards SE7320SP2 and SE7525GP2
Contents
4.3.3 Configuration Reset 60
4.3.4 Keyboard Commands 61
4.4
Entering BIOS Setup 62
4.4.1 Main Menu ...62
4.4.2 Advanced Menu...63
4.4.3 Boot Menu ...73
4.4.4 Security Menu...75
4.4.5 Server Menu ...76
4.4.6 Exit Menu...81
4.5
Flash Update Utility 81
4.6
Rolling BIOS and On-line Updates 81
4.7
Flash Update Utility 82...
Product Specification - Page 25
...for all installed processors, all processors not capable of speeds supported by the boot strap processor (BSP) are disabled and an error is displayed.
3.1.6.7
Microcode
IA-32 processors have the capability of correcting specific errata through the loading of an Intel supplied data block, i.e., microcode update. The BIOS is responsible for storing the update in non-volatile memory and loading it...
Product Specification - Page 26
...; Extended Memory 64 Technology (Intel® EM64T) Support
The system BIOS supports the Intel® Extended Memory 64 technology (Intel® EM64T) feature of the Intel® Xeon® processors. There is no BIOS setup option to enable or disable this support.
The system is in IA-32 compatibility mode when booting to an operating system. Operating
system specific drivers are loaded to enable...
Product Specification - Page 41
... all populated DRAM space under software control. Once internal configuration has been updated to reflect the types and sizes of populated DIMM devices, the MCH will traverse the populated address space initializing all locations with good ECC. This not only speeds up the mandatory memory initialization step, but also frees the processor to pursue other machine initialization...
Product Specification - Page 49
...-in card slot.
Intel RAID Technology functionality requires the following items:
ƒ Intel® 6300ESB ƒ Intel RAID Technology Option ROM must be on the platform ƒ Intel® Application Accelerator RAID Edition drivers, most recent revision. ƒ Two SATA hard disk drives. ƒ Intel RAID Technology is not available in the following configurations:
- The SATA controller in...
Product Specification - Page 68
...which is based on an AMI 8.0 core architecture. The BIOS is implemented as firmware that resides in Flash ROM. It provides hardware-specific initialization algorithms and standard PC-compatible basic input/output (I/O) services, and standard Intel® Server Board features. The Flash ROM also contains firmware for embedded PCI devices.
The BIOS is comprised of the following components:
ƒ IA...
Product Specification - Page 70
... whether Quiet Boot Mode is selected in the BIOS Setup. If selected, the BIOS displays a logo splash screen. If not, the BIOS displays a system summary and diagnostic screen in verbose mode. The default is to display the logo in Quiet Boot mode. If no logo is present in the flash ROM, or Quiet Boot mode is disabled in the...
Product Specification - Page 93
... for onboard peripherals, like SCSI, NIC and video controllers. It also contains support for the rolling single-boot BIOS update feature.
The complete ROM is visible, starting at physical address 4 GB minus the size of the flash ROM device. The Flash Memory Update utility loads the BIOS image minus the recovery block to the secondary flash partition, and notifies the BIOS that this image should be...
Product Specification - Page 94
...sections.
4.7 Flash Update Utility
Server platforms support a DOS-based firmware update utility. This utility loads a fresh copy of the BIOS into the flash ROM.
The BIOS update may affect the following items:
ƒ The system BIOS, including the recovery code, setup utility and strings. ƒ Onboard video BIOS, SCSI BIOS, and other option ROMS for the devices embedded on
the server board. ƒ...
Product Specification - Page 95
...; /r registry path to store result of operation (only for Windows version) ƒ /k Program non-critical block only ƒ /s Leave signature in BIOS ƒ /q Silent execution ƒ /h Print help
4.7.1.1
Updating the BIOS from DOS
ƒ Make sure that the flash bootable disk contains both the ROM image and the afudos update utility.
ƒ Boot to DOS.
ƒ Run the afudos...
Product Specification - Page 98
System BIOS
Intel® Server Boards SE7320SP2 and SE7525GP2
4.7.3.2
Multi-disk Recovery
The Multi-disk Recovery method is available to support ROM images greater than 1 MB when performing a BIOS recovery from multiple floppy disks.
Do the following to perform a multi-disk BIOS recovery:
1. Use the SPLIT.EXE utility to split the ROM image.
2. Execute the following command at the command ...
Product Specification - Page 99
Intel® Server Boards SE7320SP2 and SE7525GP2
System BIOS...from the ROM file.
Supported formats are dependent on the ROM and ...drive.
3. Run the following command:
OEMLogoD [/F or /FN or /N]
4.7.4.2
Changing the OEM Logo for Microsoft Windows* 2000 / 2003 / XP
1. Boot to Microsoft Windows 2000/2003/XP.
2. Download OEMLOGO.exe, Rombuild.exe, RomFile, and NewOEMlogoImage to the hard drive...
Product Specification - Page 100
... always be executed from RAM and never from flash. ƒ The code in user binary should not hook critical interrupts, should not re-program the chipset and should not take any action that affects the correct functioning of the system BIOS.
The BIOS copies the user binary into system memory before the first scan point. If the user...
Product Specification - Page 101
...® Server Boards SE7320SP2 and SE7525GP2
System BIOS
fixed location. Upon entry into the user binary, DX contains a 'token' that points to the reserved bits.
4.9 Operating System Boot, Sleep, and Wake
4.9.1
Microsoft Windows* Compatibility
Intel Corporation and Microsoft Corporation co-author design guides for system designers using Intel® processors and Microsoft* operating systems...
Product Specification - Page 139
... the PCI-to-PCI bridges are configured so that they generate a SERR# on the primary interface whenever there is a SERR# on the secondary side, if SERR# has been enabled through Setup. The same is true for PERR#.
6.1.2.2
Processor Bus Error
If the chipset supports ECC on the processor bus then the BIOS enables the error correction and detection capabilities of the processors by setting...
Product Specification - Page 140
... bytes contain OEM-specified values. The system BIOS uses these two bytes to record additional information about the error.
The format of the OEM data bytes (Event Data 2 and Event Data 3) for memory errors, PCI bus errors and FRB2 errors is described here. This format is supported by all platforms that are IPMI version 1.0 (or later) compliant.
Bits 3:1 of the generator...
Product Specification - Page 147
...Local APIC
Set up boot strap processor Information
Set up boot strap processor for POST
Enumerate and set up application processors
Re-enable cache for boot strap processor
Early CPU Init Exit
Initializes the 8042 compatible Key Board controller.
Detects the presence of PS/2 mouse.
Detects the presence of Keyboard in KBC port.
Testing and initialization of different Input Devices. Also, update the...
Product Specification - Page 148
... video adapter installed in the system that have optional ROMs. Initializes all the output devices. Allocate memory for ADM module and uncompress it. Give control to ADM module for initialization. Initialize language and font modules for ADM. Activate ADM module. Initializes the silent boot module. Set the window for displaying text information. Displaying sign-on message, CPU information, setup...
Product Specification - Page 151
Intel® Server Boards SE7320SP2 and SE7525GP2
Error Reporting and Handling
The flash has been updated successfully. Make flash write disabled.
FF
A
A
A
A
Disable ATAPI hardware. Restore CPUID value back into register.
Give control to F000 ROM at F000:FFF0h.
6.3.6
DIM Code Checkpoints
The Device Initialization Manager (DIM) module gets control at various times during BIOS POST to ...